Multimedia host processor with integrated H.264/MPEG-4 video engine

June 10th, 2008 • Related • Filed Under

Renesas Technology America, Inc. announced the SH-MobileR2 (product name: SH7723), the latest member in the SH-Mobile series of application processors for portable multimedia systems. The new multimedia processor is a next-generation device of the SH-MobileR, the first device in the SH-Mobile series designed for low power multimedia systems. The SH-MobileR2 operates about 1.5 times as fast as the first generation and delivers higher levels of processing performance in encoding and decoding audio and visual data. SH-MobileR2 is intended for use in portable and mobile devices with support for One-Seg terrestrial digital TV broadcasts, such as car navigation systems and personal navigation devices (PNDs). The SH-MobileR2 operates about 1.5 times as fast as the SH-MobileR and delivers functions providing an even higher level of performance.

The new device enables the design of portable and mobile devices with multimedia capabilities that are suitable for personal navigation devices (PNDs), portable media players and V2IP (video and voice over IP) terminals. The new multimedia application processor incorporates the SH-4A CPU core that operates at up to 400MHz and has a floating-point processing unit (FPU) that increases the efficiency of video and audio processing. At 400MHz, processing performance is 720 MIPS (million instructions per second), and FPU performance is 2.8 GFLOPS (giga floating-point operations per second). This is more than sufficient to handle parallel processing of multiple applications or general-purpose operating systems such as Windows® CE or Linux, which impose significant processing loads. The multimedia application processor’s 64Kbyte primary cache memory (32Kbytes each for instructions and data) is supplemented by a new 256Kbyte secondary cache memory (mixed instructions and data) that contributes to faster software execution.

The multimedia application processor has many on-chip peripherals, among which is the VPU5F (Video Processing Unit 5F) multi-CODEC video processing function, an IP block that achieves high performance with low power consumption. The VPU5F supports the H.264/MPEG-4 video compression standard used in Internet streaming applications and can perform VGA-size encoding and decoding at a rate of 30 frames per second (fps). It also supports MPEG-4 encoding and decoding and VC-1 decoding, making it possible to implement video e-mail, videophone, and video capture applications.

The SH-MobileR2’s 2-D graphics accelerator provides enhanced functionality and performance for faster, better-quality map rendering. Other peripheral functions include USB 2.0 host/function support (high-speed), an ATAPI controller allowing connection to a hard disk or DVD drive, and an SD host controller with high-speed specification capability. These many high-performance peripheral functions built into the new application processor make it possible to reduce the total number of parts of multimedia products and reduce the system cost, while maintaining high-level performance. To help customers shorten the development time of new products that use the SH-MobileR2 chip, a wide variety of middleware products are available for the device, including video middleware supporting H.264, MPEG-4, and WMV and audio middleware supporting aacPlus (Advanced Audio Coding Plus).

Renesas Technology aims to further extend the SH-Mobile series in future by developing products for increasingly advanced and sophisticated multimedia application systems and by introducing products optimized for evolving market needs in a timely manner. For example, a range of system solutions is planned, including a reference platform that uses the Multimedia host processor and a graphics library that supports the functions of the 2-D graphics accelerator. The reference platform will be a useful tool for examining system functions, evaluating performance, and boosting the efficiency of software development. The graphics library will facilitate the implementation of a variety of map rendering functions.

Key Features

  • 400 MHz high-speed operation and 256 Kbytes secondary memory cache, making it approximately 1.5 times as fast as its predecessor
  • Wide variety of on-chip peripheral functions, including 2-D graphics accelerator, USB 2.0 host/function support (high-speed), an ATAPI controller and an SD host controller with high-speed specification support
  • High-performance Multi-CODEC video processing IP which supports H.264/MPEG-4 AVC (H.264)

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