The first 802.3ap (KR) compliant 10GbE switch IC

May 20th, 2008 • Related • Filed Under

Fujitsu Microelectronics America, Inc. (FMA) extended its global leadership in advanced, single-chip Ethernet switch technology by introducing the 26-port MB86C69RBC, the industry’s highest density, lowest power and smallest footprint 10-Gigabit Ethernet (10GbE) switch IC. The new L2/L3 capable device features the direct support of 10Gbps serial interface for Ethernet backplane standardized as 802.3ap (KR) on all 26 ports, as well as SFP+ capability. The Fujitsu MB86C69RBC module is the industry’s most advanced, high-density switching architecture, providing a low-latency, low-power, feature-rich switch in a small form factor. The switch chip is well-suited for the L2+ switch box and the next-generation backplane fabric applications such as are seen in AdvancedTCA, μTCA and blade server platforms.

Fujitsu’s new Multi-rate 10GbE, high-density switch chip embeds 26 high-bandwidth, full-duplex 10Gbps ports into a single, integrated, small-footprint package. Each port has the flexibility to support KR, XAUI, CX-4 or SGMII. The use of adaptive equalization on each port can increase reach for XAUI, CX-4 and 10Gbps serial applications as well as eliminate the need for external re-timer circuits, reducing board space, power consumption and cost. The Fujitsu 26-port switch is the highest density, lowest power 10GbE switch available today, making it ideal for backplane fabrics or interconnect applications. Integrated programmable high-speed SerDes allows each port to be either KR, XAUI, CX-4 or 1000 Base KX or SGMII compatible, enhancing flexibility. 10Gbps serial capabilities enable direct connect to XFP modules or 10Gbps serial-KR backplanes, reducing board space, latency, cost and power consumption. Fully compliant 10Gbps serial KR capabilities enable designers to use fewer physical backplane fabric connections. An adaptive equalization algorithm eliminates the need for an external re-timer circuit in CX-4 cabling, saving board space, power, latency and cost. Redundant Gigabit Ethernet ports give users a high-availability agnostic management interface that is not tied to any particular processor. The on-chip micro-engine increases flexibility and simplifies software development, reducing time to market. Congestion management features, including Backward Congestion Notification (BCN) and per-priority-PAUSE (PPP), improve the performance and efficiency of the network, reducing the total cost of ownership.

Targeting data-center and telecom equipment applications, the MB86C69RBC integrates a comprehensive set of advanced Ethernet, Layer-2, data-center bridging, QoS and Layer-3 capabilities, along with 2.9MB buffer memory, more than any comparable switch chip. The new IC embeds 26 multi-rate high-bandwidth ports and a pair of 10/100/1000GbE management ports into a highly integrated package measuring a compact 35mm x 35mm. Eight priority classifications per port allow priority switching based on DiffServ, MAC address, VLANs, Extended VLANs and ports. Carrier-grade Ethernet features include priority PAUSE, backward-congestion notification and early drop capabilities for congestion avoidance. In addition to the standard 4K VLAN and QinQ capabilities, the switch chip provides 64-user VLAN addresses that can be used to logically partition a network without the use of QinQ. The chip supports full Layer-2 features and eight priority classifications per port, based on IPV4 and IPV6 DiffServ, MAC address, and 802.1Q VLANs. Data center Ethernet features include per priority PAUSE, backward-congestion notification and early-drop watermark capabilities for congestion avoidance. The device also has L2, L3 ACL, and L3 forwarding capabilities. The Fujitsu MB86C69RBC, which consumes only 22 watts (W) under full load conditions, supplies 520Gbps of non-blocking aggregate switching capacity in cut-through and store-forward operating modes. Overall system switching latency, including SerDes in cut-through mode, is only 300 nanoseconds, the lowest in the industry.

This new switch responds to the service providers’ need for more bandwidth at lower costs. The chip is capable of delivering congestion-free wire-speed throughput while maintaining quality of service, low latency, and high integration at a low per-port system cost, enabling system designers to deliver solutions suitable for a wide range of applications. With 10Gbps serial capabilities on each port, the Fujitsu MB86C69RBC can directly connect to optical XFP modules or 10Gbps serial-KR backplanes (802.3ap compliant) on any port, eliminating the use of third-party SerDes chips. This reduces board complexity, lowers costs, and cuts down development time. The chip’s sophisticated congestion management and per priority PAUSE technology is critical for optimal performance in server virtualization and consolidation applications, which are being supported by the converged data fabrics emerging in today’s data center. The chip offers 520Gbps of non-blocking aggregate switching capacity in both cut-through and store-and-forward modes of operation. A switching latency of 300ns (including SerDes in cut-through mode) makes the switch ideally suited for high-density, latency-sensitive applications.

Integrated, programmable, high-speed SerDes allows each port to directly support the 10GBASE-KR standard for backplane serial connectivity, along with 1000BASE-KX. Fully compliant 10Gbps serial XFI/KR capabilities allow designers to achieve connectivity using fewer physical connections to the backplane or the XFP/SFP+ optical module, all with the lowest power consumption and overall switching latency in the industry. The result is maximum flexibility for applications such as high-density backplane switching, blade server switching, microTCA MCH designs, and Advanced TCA carrier-board backplane-fabric applications.

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